1. Field of the Invention
The present invention relates to a capacitor element for a solid electrolytic capacitor utilizing valve metal such as tantalum or aluminum. The present invention also relates to a process of making such a capacitor element.
2. Description of the Related Art
A conventional capacitor element used for a solid electrolytic capacitor may have the following arrangements.
Referring to FIG. 14 of the accompanying drawings, the illustrated conventional capacitor element includes a porous capacitor chip 2 and an anode wire 3 projecting from a top face 2a of the chip 2. The capacitor chip 2 is prepared by compacting powder of valve metal (such as tantalum) into a porous mass and then sintering the porous mass. The anode wire 3 may also be made of tantalum. For providing a capacitor function, the capacitor element is subjected to the following process steps.
First, as shown in FIG. 15, the porous sintered capacitor chip 2 and part of the anode wire 3 are immersed in an aqueous solution B of e.g. phosphoric acid in a container A. In this state, the immersed chip 2 and anode wire 3 are subjected to anodic oxidation (electrolytic oxidation) by applying a direct current. As a result, a dielectric coating 4 of e.g. tantalum pentoxide is formed on the surfaces of the tantalum particles and on the immersed root portion of the anode wire 3, as shown in FIG. 15.
Then, as shown in FIG. 16, the dielectrically coated chip 2 is immersed in an aqueous solution D of e.g. manganese nitrate in another container C to such an extent that the top surface 2a of the chip 2 is not submerged under the surface of the manganese nitrate solution, the chip 2 being thereafter taken out of the solution for baking. This step is repeated plural times to form a layer 5 of solid electrolyte (e.g. manganese dioxide) on the dielectric coating 4.
Finally, as shown in FIG. 17, a metallic cathode terminal layer 6 (made of nickel for example) is formed on the solid electrolyte layer 5 with an intervening layer of e.g. graphite being interposed between the cathode terminal layer 6 and the electrolyte layer 5.
According to the conventional process described above, in order to electrically insulate the cathode terminal layer 6 from the anode wire 3 with the use of the dielectric layer 4, it is necessary to prevent the electrolytic layer 5 and the cathode terminal layer 6 from being formed on the top surface 2a of the chip 2. For that purpose, as shown in FIG. 16, the top surface 2a of the chip 2 should be kept above the surface of the aqueous solution while the other portions of the chip 2 are immersed in the solution. However, preparation of arrangements for performing such a positional adjustment can often be troublesome. Besides, even with those arrangements, the resulting cathode terminal layer 6 may often be formed on the top surface 2a as well, unfavorably coming into contact with the anode wire 3.
Reference is now made to FIG. 18 which shows a conventional solid electrolytic capacitor using the capacitor element described above. As illustrated, the conventional solid electrolytic capacitor is provided with an anode plate 7 welded to the free end of the anode wire 3 over a distance S. The same capacitor is also provided with a resin package 8 for enclosing the chip 2, the anode wire 3 and the anode plate 7. The bottom surface of the cathode terminal layer 6 (in FIG. 18, the upright surface parallel to the top surface 2a) is electrically connected to a cathode plate 9.
Another type of conventional solid electrolytic capacitor is shown in FIG. 19. The illustrated capacitor includes an anode lead terminal 10 welded to the anode wire 3, and a cathode lead terminal 11 connected to the cathode terminal layer 6. The chip 2, the anode wire 3 and part of the respective lead terminals 10, 11 are enclosed by a resin package 12.
For manufacturing the conventional capacitor shown in FIG. 18 or FIG. 19, the anode plate 7 (FIG. 18) or the anode lead terminal 10 (FIG. 19) will be connected to the anode wire 3 by welding for example. According to this method, however, the heat generated for performing the welding may cause damage to the dielectric layer 4, the solid electrolytic layer 5 and the cathode terminal layer 6. For avoiding this problem, the anode wire 3 is rendered to have a rather great length L. However, such an arrangement unfavorably increases the entire length of the resulting solid electrolytic capacitor. In addition, the conventional anode wire 3 needs an additional length S for attachment of the anode plate 7 (or lead terminal 10), which further increases the entire length of the capacitor. Supposing that the sizes of the package 12 (FIG. 19) are fixed to predetermined values, as the length of the anode wire 3 increases, the volume of the capacitor chip 2 should be reduced. As a result, the impedance characteristics of the resulting solid electrolytic capacitor will unfavorably be deteriorated.